CVE-2026-0995
Received
Received - Intake
Memory Ordering Flaw in Arm C1-Pro Affects SME Accesses
Publication date: 2026-03-02
Last updated on: 2026-04-20
Assigner: Arm Limited
Description
Description
An issue has been identified in Arm C1-Pro before r1p2-50eac0, where, under certain conditions, a TLBI+DSB might fail to ensure the completion of memory accesses related to SME.
CVSS Scores
EPSS Scores
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Meta Information
Affected Vendors & Products
| Vendor | Product | Version / Range |
|---|---|---|
| arm | c1-pro_firmware | to r1p2-50eac0 (exc) |
Helpful Resources
Exploitability
CWE
KEV
| CWE ID | Description |
|---|---|
| CWE-362 | The product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently. |
Attack-Flow Graph
AI Powered Q&A
Can you explain this vulnerability to me?
This vulnerability exists in Arm C1-Pro processors before version r1p2-50eac0. Under certain conditions, the TLBI+DSB operation may fail to guarantee the completion of memory accesses related to SME (Scalable Matrix Extension).
How can this vulnerability impact me? :
Because the TLBI+DSB might not ensure completion of memory accesses related to SME, this could lead to inconsistent or incomplete memory operations, potentially causing system instability or incorrect behavior in applications relying on SME.
How does this vulnerability affect compliance with common standards and regulations (like GDPR, HIPAA)?:
I don't know
How can this vulnerability be detected on my network or system? Can you suggest some commands?
I don't know
What immediate steps should I take to mitigate this vulnerability?
I don't know
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