CVE-2026-0995
Received Received - Intake
Memory Ordering Flaw in Arm C1-Pro Affects SME Accesses

Publication date: 2026-03-02

Last updated on: 2026-04-20

Assigner: Arm Limited

Description
An issue has been identified in Arm C1-Pro before r1p2-50eac0, where, under certain conditions, a TLBI+DSB might fail to ensure the completion of memory accesses related to SME.
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Meta Information
Published
2026-03-02
Last Modified
2026-04-20
Generated
2026-06-16
AI Q&A
2026-03-02
EPSS Evaluated
2026-06-15
NVD
CVE-2026-0995
EUVD
EUVD-2026-9178
Affected Vendors & Products
Showing 1 associated CPE
Vendor Product Version / Range
arm c1-pro_firmware to r1p2-50eac0 (exc)
Helpful Resources
Exploitability
CWE
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KEV
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CWE ID Description
CWE-362 The product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently.
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Executive Summary

This vulnerability exists in Arm C1-Pro processors before version r1p2-50eac0. Under certain conditions, the TLBI+DSB operation may fail to guarantee the completion of memory accesses related to SME (Scalable Matrix Extension).

Impact Analysis

Because the TLBI+DSB might not ensure completion of memory accesses related to SME, this could lead to inconsistent or incomplete memory operations, potentially causing system instability or incorrect behavior in applications relying on SME.

Compliance Impact

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Detection Guidance

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