CVE-2026-45944
Analyzed Analyzed - Analysis Complete
IOMMU Context Entry Clear Vulnerability in Linux Kernel

Publication date: 2026-05-27

Last updated on: 2026-06-16

Assigner: kernel.org

Description
In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down context entry When tearing down a context entry, the current implementation zeros the entire 128-bit entry using multiple 64-bit writes. This creates a window where the hardware can fetch a "torn" entry β€” where some fields are already zeroed while the 'Present' bit is still set β€” leading to unpredictable behavior or spurious faults. While x86 provides strong write ordering, the compiler may reorder writes to the two 64-bit halves of the context entry. Even without compiler reordering, the hardware fetch is not guaranteed to be atomic with respect to multiple CPU writes. Align with the "Guidance to Software for Invalidations" in the VT-d spec (Section 6.5.3.3) by implementing the recommended ownership handshake: 1. Clear only the 'Present' (P) bit of the context entry first to signal the transition of ownership from hardware to software. 2. Use dma_wmb() to ensure the cleared bit is visible to the IOMMU. 3. Perform the required cache and context-cache invalidation to ensure hardware no longer has cached references to the entry. 4. Fully zero out the entry only after the invalidation is complete. Also, add a dma_wmb() to context_set_present() to ensure the entry is fully initialized before the 'Present' bit becomes visible.
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Meta Information
Published
2026-05-27
Last Modified
2026-06-16
Generated
2026-06-16
AI Q&A
2026-05-27
EPSS Evaluated
2026-06-15
NVD
EUVD
Affected Vendors & Products
Showing 2 associated CPEs
Vendor Product Version / Range
linux linux_kernel From 6.19 (inc) to 6.19.4 (exc)
linux linux_kernel From 2.6.24 (inc) to 6.18.14 (exc)
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Exploitability
CWE
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CWE ID Description
CWE-UNKNOWN
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Executive Summary

This vulnerability exists in the Linux kernel's iommu/vt-d implementation. When tearing down a context entry, the current method zeros out the entire 128-bit entry using multiple 64-bit writes. This process creates a timing window where the hardware might read a "torn" entryβ€”meaning some parts are zeroed while the 'Present' bit is still set. This can cause unpredictable behavior or spurious faults.

The issue arises because the compiler may reorder writes to the two 64-bit halves of the context entry, and hardware fetches are not guaranteed to be atomic relative to multiple CPU writes. The fix aligns with the VT-d specification by first clearing only the 'Present' bit to signal ownership transfer from hardware to software, ensuring memory visibility with dma_wmb(), performing cache invalidations, and only then zeroing out the entire entry.

Impact Analysis

This vulnerability can lead to unpredictable behavior or spurious faults in systems using the affected Linux kernel iommu/vt-d implementation. Because the hardware might read partially updated context entries, it could cause system instability or errors related to IOMMU operations.

Mitigation Strategies

This vulnerability has been resolved in the Linux kernel by changing the way the VT-d context entry is torn down.

  • Clear only the 'Present' bit of the context entry first to signal ownership transition from hardware to software.
  • Use dma_wmb() to ensure the cleared bit is visible to the IOMMU.
  • Perform the required cache and context-cache invalidation to ensure hardware no longer has cached references to the entry.
  • Fully zero out the entry only after the invalidation is complete.

Additionally, ensure that dma_wmb() is added to context_set_present() to guarantee the entry is fully initialized before the 'Present' bit becomes visible.

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