CVE-2026-98654
Received Received - Intake

Race Condition in AMD Display Driver IRQ Handling

Vulnerability report for CVE-2026-98654, including description, CVSS score, EPSS score, affected products, exploitability, helpful resources, and attack-flow context.

Publication date: 2026-10-18

Last updated on: 2026-10-18

Assigner: kernel.org

Description

In the Linux kernel, the following vulnerability has been resolved: drm/amd/display: Atomize IRQ register read/modify/write ops [Why] The OTG_GLOBAL_SYNC_STATUS register controls various HW IRQ sources for the output timing generator (OTG). VUPDATE_NO_LOCK is one of them. To enable the IRQ, driver sets the VUPDATE_NO_LOCK_EN bit in the GLOBAL_SYNC_STATUS register. To ack the IRQ after it fires, the driver sets the VUPDATE_NO_LOCK_CLEAR bit in the same GLOBAL_SYNC_STATUS register. The bit sets are done through read/modify/write operations, which are not atomic. Thus, the following race is possible: Thread A: IRQ handler: *HW IRQ fires* # IRQ disable val = read(GLOBAL_SYNC_STATUS) unset(val, VUPDATE_NO_LOCK_EN) write(val, GLOBAL_SYNC_STATUS) # ACK reads VUPDATE_NO_LOCK_EN unset val1 = read(GLOBAL_SYNC_STATUS) set(val1, VUPDATE_NO_LOCK_CLEAR) # IRQ enable val = read(GLOBAL_SYNC_STATUS) set(val, VUPDATE_NO_LOCK_EN) write(val, GLOBAL_SYNC_STATUS) # BAD! clears VUPDATE_NO_LOCK_EN write(val1, GLOBAL_SYNC_STATUS) Regarding the tagged Fixes: change, it appears the change made this race more likely to occur. Since VUPDATE_NO_LOCK is now the sole IRQ source for vblank handling, a single race on high refresh panels can lead to a time out. [How] The GLOBAL_SYNC_STATUS register is only one example, other IRQ control registers also share the same scheme. On top of GLOBAL_SYNC_STATUS, let's clean up those as well. To keep things simple, Let's atomize the IRQ rmw ops via a single driver-wide spinlock. Due to the small scope of this lock, it is unlikely to cause noticeable overhead on top of all the existing locking within the IRQ set/handle paths. Since DM is responsible for locking, wrap dc_interrupt_set/ack with the spinlock in the new amdgpu_dm_irq_set/ack functions. Migrate/drop all references in DM to dc_interrupt_set/ack to use amdgpu_dm_irq_set/ack instead. (cherry picked from commit 70de0a0216583a53c946155f8c8adedfdca6b4e7)

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Meta Information

Published
2026-10-18
Last Modified
2026-10-18
Generated
2026-10-18
AI Q&A
2026-10-18
EPSS Evaluated
N/A
NVD
EUVD

Affected Vendors & Products

Showing 2 associated CPEs
Vendor Product Version / Range
Linux Linux c87e6635d2db02c88ae8d09529362da672d34770
Linux Linux 7.3-rc1

Helpful Resources

Exploitability

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CWE ID Description
CWE-UNKNOWN

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Executive Summary

This vulnerability is a race condition in the Linux kernel's AMD display driver. It occurs when read/modify/write operations on the OTG_GLOBAL_SYNC_STATUS register are not atomic, allowing a thread to disable an IRQ while an interrupt handler is trying to acknowledge it. This can lead to a timeout on high refresh rate panels.

Detection Guidance

This vulnerability is specific to the Linux kernel's AMD display driver (drm/amd/display) and involves a race condition in IRQ register operations. Detection requires checking kernel logs for related errors or timeouts, particularly on systems using AMD GPUs with high refresh rate panels. No direct network detection commands are applicable.

Impact Analysis

This vulnerability may cause system hangs or crashes during display operations, particularly on high refresh rate monitors. It could lead to graphical glitches, application freezes, or system instability when handling display interrupts.

Mitigation Strategies

Apply the kernel patch that atomizes IRQ register read/modify/write operations using a driver-wide spinlock. Update to a kernel version containing the fix (commit 70de0a0216583a53c946155f8c8adedfdca6b4e7). Monitor for related errors in kernel logs after applying the patch.

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